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PJ494 Switchmode Pulse Width Modulation Control Circuit
he PJ494 incorporates on a single monolithic chip all the functions required in the construction of a pulsewidth-modulation control circuit. Designed primarily for power supply control, these devices offer the systems engineer the flexibility to tailor the power supply control circuitry to his application. The PJ494 contains an error amplifier, an on-chip adjustable oscillator, a deed-time control comparator, pulse-steering control flip-flop, a 5-volt, 5% precision regulator, and outputcontrol circuits. The error amplifier exhibits a common-mode voltage from -0.3 volts to Vcc -2 volts. The dead-time control comparator has a fixed offset that provides
T
approximately 5% dead time when externally altered. The onchip oscillatory be bypassed by terminating RT (pin 6) to the reference output and providing a sawtooth input to CT (PIN 5), or it may be used to drive the common circuits in synchronous multiple-rail power supplies. The uncommited output transistor provide either common-emitter or emitterfollower output capability. Each device provides for push-pull or single-ended output operation, which may be selected through the output-control function. The architecture of these devices prohibits the possibility of either output being pulsed twice during push-pull operation.
FEATURES
* * * * * * * Complete PWM Power Control Circuitry Uncommitted Outputs for 200mA Sink or Source Current Output Control Selects Single-Ended or Push -Pull Operation Internal Circuitry Prohibits Double Pulse at Either Output Variable Dead-Time Provides Control over Total Range Internal Regulator Provides a Stable 5-V Reference Supply, 5% Circuit Architecture Allows Easy Synchronization OperatingTemperature (Ambient) PJ494CD PJ494CS -20 to +85 DIP-16 SOP-16 Package
DIP-16
SOP-16
ORDERING INFORMATION
Device
Pin 1.Noninv Input 2.Inv Input 3.Feedback 5.CT 8.C1 11.C2 13.Output Control 15. Inv Input 16. Noninv Input
Error Amp1
4.Dead-Time Control 6.RT 7.Gnd 9.E1 10.E2 12.Vcc 14.Ref Out
Error Amp2
ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE
(unless otherwise noted) Rating Supply voltage Amplifier input voltage Collector output voltage Collector output current Operating free-air temperature range Storage temperature range Operating Junction Temperature Lead temperature 1,6mm from case for 10 seconds Power Dissipation @TA45 PD Tstg TJ Symbol Vcc Vi Vo Value 41 Vcc+0.3 41 250 -20 to 85 -25 to 125 125 260 1000 mW mA Unit V
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RECOMMENDED OPERATING CONDITIONS
Parameter Supply voltage Amplifier input voltage Collector output voltage Collector output current(each transistor) Current into feedback terminal Timing capacitor Timing resistor Oscillator frequency Operating free-air temperature Symbol Vcc Vi Vo Min 7 -0.3 Max 40 Vcc-2 40 200 0.3 10000 500 300 70 Unit V
mA nF K KHz
CT RT TA
0.47 1.8 1 0
ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING FREE-AIR TEMPERATURE
Vcc=15V, f=10KHz (unless otherwise noted). REFERENCE SECTION Parameter Output voltage(Vref) Line regulation Load regulation Output voltage change with temperature Short-circuit output current*** OSCILLATOR SECTION Parameter Frequency Standard deviation of frequency**** Frequency change with voltage Frequency change with temperature*** Test Conditions* CT=0.001F,RT=30K CT=0.001F,RT=30K Vcc=7V to 40V, TA=25 CT=0.001F,RT=30K TA=MIN to MAX Test Conditions* Vo=(pin 3)=2.5V Vo=(pin 3)=2.5V Vo=(pin 3)=2.5V Vcc=7V to 40V Vo=3V,RL=2K,Vo=0.5 to 3.5V RL=2K,Vo=0.5 to 3.5V Vo=40V, TA=25 Vcc=33V,Vo=2.5V,RL=2K VID=-15mV to -5V,V(PIN3)=0.7V VID=15mV to 5V,V(PIN3)=3.5V Test Conditions VCE=40V,VCC=40V Vcc=Vc=40V, VE=0 VE=0, Ic=200mA Vc=15V, IE=-200mA VI=Vref Min -----Min ---70 -65 -0.3 2.0 Min ----Value Typ 40 3.0 0.1 -Unit Max ---12 KHz % Test Conditions* Io=1mA Vcc=7V to 40V Io=1mA to 10mA TA=MIN to MAX Vref=0 Min 4.75 ---15 Value Typ 5 2.0 3.0 0.2 35 Unit Max 5.25 25 15 1 75 V mV % mA
ERROR AMPLIFIER SECTION Parameter Input offset voltage Input offset current Input bias current Common-mode input voltage range Open-loop voltage amplification Unity-gain bandwidth Common-mode rejection ratio Power Supplu Rejection Ratio Output sink current (pin 3) Output source current (pin 3) OUTPUT SECTION Parameter Collector off-state current Emitter off-state current Collector-emitter saturation voltage Output control input current
Value Typ** Max 2.0 10 5.0 250 -0.1 -1.0 -0.3 toVcc-2 95 -800 -90 -100 -0.7 --4.0 --
Unit mA nA A V dB KHz dB dB mA mA
Common-emitter Emitter-follower
Value Typ 2.0 -1.1 1.5 --
Unit Max 100 -100 1.3 2.5 3.5 A V mA
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DEAD-TIME CONTROL SECTIONDead-time control-section (See Figure 11) Parameter Test Conditions Min Input bias current (pin 4) VI=0 to 5.25V --Maximum duty cycle, each output VI(pin 4)=0,CT=0.1F,RT=12K Input threshold voltage(pin 4) Zero duty cycle -Maximum duty cycle 0 PWM COMPARATOR SECTION (See Figure11) Parameter Test Conditions Input threshold voltage (pin 3) Input sink current (pin 3) TOTAL DEVICE Parameter Standby supply current Average supply current Zero duty cycle V(pin 3)=0.7V Min -0.3 Value Typ* -2.0 45 3.0 -Unit Max -10 50 3.3 -A % V
Value Typ* 4.0 0.7
Unit Max 4.5 -V mA
Test Conditions Pin 6 at Vref, all other inputs and outputs open VI(PIN4)=2V, See Figure 1 Vcc=15V Vcc=40V Min ----
Value Typ* 6.0 9.0 7.5
Unit Max 10 15 -mA
SWITCHING CHARACTERISTICS, TA=25 Parameter Test Conditions Output voltage rise time Output voltage fall time Output voltage rise time Output voltage fall time Common-emitter configuration, See Figure 3 Emitter-follower configuration, See Figure 4 Min -----
Value Typ* 100 25 100 40
Unit Max 200 100 200 100 ns
UNDERVOLTAGE LOCKOUT SECTION Parameter Test Conditions Turn-on Threshold Vcc increasing Iref =1.0mA Min 5.5
Value Typ* 6.43
Unit Max 7.0 V
All typical value except for temperature coefficient are at TA=25 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values except for parameter changes with temperature are at TA=25 Duration of the short-circuit should not exceed one second Standard deviation is a measure of the statistical distribution about the mean as derived from the formula
N ( x - x) 2 = n n =1 N - 1
1
2
Temperature coefficient of timing capacitor and timing resistor not taken into account
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PJ494 Switchmode Pulse Width Modulation Control Circuit
FUNCTION BLOCK DIAGRAM
This device contained 46 active transistors
Figure 1. Representative Block Diagram
Figure 2. Timing Diagram
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APPLICATIONS INFORMATION
Description The PJ494 is a fixed-frequency pulse width modulation control circuit, incorporating the primary building blocks required for the control of a switching power supply . (See Figure 1.) An internal-linear sawtooth oscillator is frequescy-programmable by two external components, RT and CT. The approximate oscillator frequency is determined by: ........... For more information refer to Figure 3. Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flip-flop clock-input line is in its low state. This happens only during that portion of time when the sawtoothvoltage is greater than the control signals. Therefore, an increase in contro-signal amplitude causes a corresponding linear decrease of output pulse width. (Refer to the Timing Diagram shown in Figure 2.) The control signals are external inputs that can be fed into the deadtime control, the error amplifier inputs, or the feedback input. The deadtime control comparator has an effective 120mV input offset which limits the minimum output deadtime to approximately tge first 4% of the sawtooth-cycle time. This would result in a maximum duty cycle on a given output of 96% with the output control grounded, and 48% with it connected to the reference line. Additional deadtime may be imposed on the output by setting the deadtime-control input to a fixed voltage, ranging between 0V to 3.3V .
The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the maximum percent on-time, established by the deadtime control input, down to zero as the voltage at the feedback pin varies from 0.5V to 3.5V. Both error amplifiers have a common mode input range from -0.3C to (Vcc - 2V), and may be ised to sense powersupply output voltage and current. The error -amplifier outputs are active high and are ORed together at the noninverting input of the pulse-width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of the loop. When capacitor CT is discharged, a positive pulse is generated on the output of the deadtime comparator, which clocks the pulse-steering flip=flop and inhibits the output transistors, Q1 and Q2. With the output-control connected to the reference line, the pulse-steering flip-flop directs the modulated pulses to each of the rwo output transistors alternately for push-pull operation. The output frequency is equal to half that of the oscillator. Output drive can also be taken from Q1 and Q2, when single-ended operation with a maximum on-time of less than 50% is required. This is desirable when the output transformer has a ringback winding with a catch diode ised for snubbing. When higher output-drive currents are required for single-ended operation, Q1 and Q2 may be connected in parallel, and the output mode pin must be tied to ground to disable the flip-flop. The output frequency will now be equal to that of the oscillator. The PJ494 has an internal 5.0V reference capable of sourcing up to 10mA of laod current for external bias circuits. The reference has an internal accuracy of 5.0% with a typical thermal drift of less than 50mV over an operating temperature range of 0 to 70.
Figure 3. Oscillator Frequency versus Timing Resistance
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Figure 4. Open Loop Voltage Gain and Phase Versus Frequency
Figure 5. Percent Deadtime versus Oscillator Frequency
Figure 6. Percent Duty Cycle versus Deadtime Control Voltage
Figure 7. Emitter-Follower Configuration Output Saturation versus Emitter Current
Figure 8. Common-Emitter Configuration Output Saturation Voltage versus Collector Current
Figure 9. Standby Supply Current versus Supply Voltage
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Figure 10. Error-Amplifier Characteristics
Figure 11. Deadtime and Feedback Control Circuit
Figure 12. Common -Emitter Configuration Test Circuit and Waveform
Figure 13. Emitter-Follower Configuration Test Circuit and Waveform
Figure 14. Error-Amplifier Sensing Techniques
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Figure 15. Deadtime Control Circuit
Figure 16. Soft-Start Citcuit
Figure 17. Output Connections for Single-Ended and Push-Pull Configurations
Figure 18. Slaving Two or More Control Circuit
Figure 19. Operation With VIN >40V Using External Zener
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Figure 20. Pulse Width Modulated Push-Pull Converter Test
Line Regilation Load Regilation Output Ripple Short Circuit Current Efficiency
Condition
VIN = 10V to 40V VIN = 28V, Io =1.0mA to 10A VIN = 28V, Io =1.0A VIN = 29V, RL=0.1 VIN = 28V, Io =1.0A
Result
14mV 0.28% 3.0mV 0.06% 65mV pp P.A.R.D 1.6A 71%
L1 - 3.5mH @ 0.3A T1 - Primary : 20T C.T. #28 AWG Secondary : 120T C.T. #36 AWG Core : Ferroxcube 1408P-L00-3CB
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Figure 21. Pulse Width Modulated Step-Down Converter Test
Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency
Condition
VIN = 8.0V to 40V VIN = 12.6V, Io = 0.2mA to 200mA VIN = 12.6V, Io = 200mA VIN = 12.6V, RL=0.1 VIN = 12.6V, Io = 200mA
Result
3.0mV 0.01% 5.0mV 0.02% 40mV pp P.A.R.D 250mA 72%
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DIM A B C D G J K L M
MILLIMETERS MIN MAX 17.80 18.05 6.25 6.45 2.35 2.65 0.35 0.49 1.27BSC 0.25 0.32 0.10 0.25 0 7 10
INCHES MIN MAX 0.701 0.710 0.292 0.299 0.093 0.104 0.014 0.019 0.05BSC 0.010 0.012 0.004 0.009 0 7 0.395 0.415
DIM A B C D F G K M P R
MILLIMETERS MIN MAX 9.80 10.00 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27BSC 0.10 0.25 0 7 10.05 10.55 0.25 0.75
INCHES MIN MAX 0.386 0.393 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.05BSC 0.004 0.009 0 7 0.395 0.415 0.010 0.029
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